Principal Engineer Functional Verification (f/m/div)
Job DescriptionAs a Principal Engineer for Functional Verification, you will be an integral part of a dynamic verification team, leveraging
- edge verification tools and methodologies to facilitate the functional verification of large and complex memory devices. Your will act as an expert in verification topics, effectively steering ongoing work, and providing technical mentorship to other team members. You will play a deep and crucial role in testbench development and verification closure, utilizing System Verilog and UVM to ensure the highest standards of quality and efficiency.
In your new role you will:
- Design self-checking test benches using modern verification techniques
- Design verification components such as functional and behavioral models, monitors, and checkers
- Implement functional coverage and assertions using System Verilog and UVM
- Develop test and functional coverage plans based on device specifications
- Analyze and debug simulation failures, as well as analyzing functional coverage results to guarantee zero defect outcomes
- Manage verification teams through all design phases
As a driven and
- oriented leader, you are motivated by the pursuit of ambitious goals while remaining strongly committed to delivering
- quality product development. You believe in the power of asking questions and challenging assumptions to ensure that we consistently achieve
- quality outcomes. Collaborating with management and peers across different sites, you strive to optimize our processes and drive towards the best results with maximum efficiency.
You are best equipped for this task if you have:
- BSc degree in Electrical Engineering, or a related field
- At least 10 years of experience in IC verification with constrained-random, coverage driven verification closure
- Deep knowledge in IP and So
C verification concepts and implementation with UVM methodology - Deep knowledge in verification concepts, methodologies, EDA tools, including all design phases and BIST activities
- Experience developing and working with verification languages like: System Verilog, OVM, UVM
- A solid understanding of verification concepts and experience in designing
- based test benches - Knowledge and experience in C coding, Power aware, and gate level simulation
- Excellent written and oral communication skills
- Strong debugging skills
- Problem solving skills
- Fluency in English
- Möglichkeit mobil aus dem Ausland zu arbeiten (EU)
#We
Are
In for driving decarbonization and digitalization.
As a global leader in semiconductor solutions in power systems and Io
T, Infineon enables
- changing solutions for green and efficient energy, clean and safe mobility, as well as smart and secure Io
T. Together, we drive innovation and customer success, while caring for our people and empowering them to reach ambitious goals. Be a part of making life easier, safer and greener.
Are you in?
We are on a journey to create the best Infineon for everyone.
This means we embrace diversity and inclusion and welcome everyone for who they are. At Infineon, we offer a working environment characterized by trust, openness, respect and tolerance and are committed to give all applicants and employees equal opportunities. We base our recruiting decisions on the applicant´s experience and skills.
We look forward to receiving your resume, even if you do not entirely meet all the requirements of
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